Researchers from the University of Sydney, in collaboration with IBM, reported a significant improvement in the survival rate of logical qubits to 96% using a new error correction mechanism.
The main obstacle to creating stable machines for the transition to a new era of fault-tolerant quantum computing (FTQC) is "idle noise," which occurs during intermediate measurements of qubits mid-computation.
In current quantum devices, the system must regularly conduct internal checks to correct errors. However, during these pauses, other components of the processor lose stability, leading to new failures.
To address this issue, physicists completely redesigned the error correction circuit architecture, drastically reducing the downtime during computations. The new method was tested on the advanced 156-qubit superconducting quantum processor IBM Quantum Heron r2. Thanks to algorithm optimization, the survival rate of logical qubits during a single error correction cycle was increased from less than 90% to 96%.
Project leader and director of Sydney Nano, Steven Bartlett, emphasized that this process occurs repeatedly at every stage of computation, and the forced downtime of other elements poses a "serious barrier" to reliable operation.
Although this result was achieved in a laboratory setting on a single processor, the research's scalability and fault tolerance are critically important for the industry. These remain the main barriers to quantum computing.
It is worth noting that in June, corporations made progress in quantum error correction.
Previously, IBM planned to achieve the first confirmed instances of quantum advantage by the end of 2026.