Classiq has introduced the Fault Tolerance Engine, a tool designed to convert logical quantum programs into fault-tolerant plans suitable for execution on physical hardware.
In the realm of quantum computing, it's not straightforward to relay a logical operation directly to a chip. Instead, the program must be allocated across physical qubits, shielded from hardware noise, and accompanied by ongoing error correction.
The Fault Tolerance Engine connects high-level code with the physical architecture. It organizes task scheduling, allocates protected qubits on the chip, and establishes their interaction pathways while minimizing hardware costs.
This engine computes precise parameters for calculations, including the number of physical qubits required, error correction cycles, operational time, and overall reliability. Its assessments are based on a completed execution plan rather than theoretical models. This enables developers to preemptively determine whether an algorithm will function on a specific device and identify potential bottlenecks.
“It’s not enough to simply create an optimized logical circuit. One must understand how the program will transform when each operation needs to be protected and executed on physical hardware,” stated Classiq co-founder and CEO Nir Minerbi.
The new module is integrated into Classiq’s platform and its proprietary programming language, Qmod. This solution empowers developers to evaluate the physical feasibility of tasks before computation costs escalate.
Additionally, in September, Intel CEO Pat Gelsinger remarked that in the future, quantum computers will work alongside CPUs and GPUs in certain scenarios, effectively becoming a third class of processors.
Stay updated by following ForkLog on social media:
Telegram (main channel) Facebook X